1. Field of the Invention
The invention is a device to detect the logic state of a component whose impedance varies with its logic state. The invention particularly applies to the detection of the logic state of any component whose state is detected by measuring a current.
It is particularly applicable to reading memory cells which, in most cases, do not have the same impedance when in the programmed state as when in the complementary state following erasure. This particularly applies to PROM, EPROM, ROM and EEPROM cells.
2. Description of the Prior Art
An example of a component logic state detection device L complying with the prior art is represented in FIG. 1. As will be described in detail, based on the use of such a device to read a memory cell, a major disadvantage of the prior art device is that it shows a variation in current consumption which can be measured from outside the circuit in which the device is integrated. Consequently, it is only necessary to measure the current from outside the circuit to determine the logic state of the measured internal component.
To determine the logic state of a memory cell CEL, an amplifier AM is connected, via a transistor T1, to terminal BL which is connected to the bit line in the memory. A second transistor T2 is included so that node A, which is the common point between one electrode of transistor T1 and one electrode of transistor T2, is connected to the input to amplifier AM.
A reference voltage Vref is applied to the gate of transistor T2 and a supply voltage Vcc is applied to the second electrode of the transistor. Transistor T2 is therefore polarized by voltage Vref and generates a current IR.
The memory cell is selected by applying a required voltage SBL to the gate of transistor T1. When a cell is selected, it is possible to read it by applying a read voltage to the cell WL input and a voltage CG to the cell control gate input.
Depending on whether the cell logic state is "programmed" or "erased", the cell will draw current IC and the voltage at node A will drop. In addition, if the impedance of the cell is high, current IC is roughly zero and the voltage at node A is close to Vcc.
If the cell impedance is low, current IC will be positive and the voltage at node A will drop. Amplifier AM can therefore detect the logic state of the cell by detecting whether there is a voltage drop or not. This variation in current can be measured across the external terminals of the memory containing the cells read in this way.
As an example, the current is approximately 50 .mu.A when reading a cell whose programmed logic state corresponds to a voltage VT=2.5 V and is less than 1 .mu.A when the cell is erased. The variation in current measured is therefore approximately 50 .mu.A. This variation is larger than any noise in the power supply and can, therefore, easily be detected by a picoammeter.
This possibility of determining the logic state of cells from outside the memory by measuring current variations is a considerable disadvantage if the memory contains data which must remain secret.